This section provides background information related to the present disclosure which is not necessarily prior art.
FIG. 1 is a view illustrating one example of the semiconductor light emitting device (Lateral Chip) in the prior art, in which the semiconductor light emitting device includes a substrate 100, and a buffer layer 200, a first semiconductor layer 300 having a first conductivity, an active layer 400 for generating light via electron-hole recombination and a second semiconductor layer 500 having a second conductivity different from the first conductivity, which are deposited over the substrate 100 in the order mentioned, and additionally, a light-transmitting conductive film 600 for current spreading, and an electrode 700 serving as a bonding pad are formed thereon, and an electrode 800 serving as a bonding pad are formed on an etch-exposed portion of the first semiconductor layer 300.
FIG. 2 is a view illustrating another example of the semiconductor light emitting device (Flip Chip) in the prior art, in which the semiconductor light emitting device includes a substrate 100, and a first semiconductor layer 300 having a first conductivity, an active layer 400 for generating light via electron-hole recombination and a second semiconductor layer 500 having a second conductivity different from the first conductivity, which are deposited over the substrate 100 in the order mentioned, and additionally, three-layered electrode films for reflecting light towards the substrate 100, i.e., an electrode film 901, an electrode film 902 and an electrode film 903 are formed thereon, and an electrode 800 serving as a bonding pad is formed on an etch-exposed portion of the first semiconductor layer 300.
FIG. 3 is a view illustrating yet another example of the semiconductor light emitting device (Vertical Chip) in the prior art, in which the semiconductor light emitting device includes a first semiconductor layer 300 having a first conductivity, an active layer 400 for generating light via electron-hole recombination and a second semiconductor layer 500 having a second conductivity different from the first conductivity, which are deposited in the order mentioned, and additionally, a metal reflective film 910 for reflecting light towards the first semiconductor layer 300 is formed on the second semiconductor layer 500, and an electrode 940 is formed on the side of a supporting substrate 930. The metal reflective film 910 and the supporting substrate 930 are joined together by a wafer bonding layer 920. An electrode 800 serving as a bonding pad is formed on the first semiconductor layer 300.
FIG. 4 and FIG. 5 illustrate yet further examples of the semiconductor light emitting device in the prior art. As illustrated in FIG. 4, a semiconductor light emitting device (Flip Chip) as shown in FIG. 2 is mounted on a wiring board (1000), and then a substrate 100 is removed as shown in FIG. 5, thereby obtaining a semiconductor light emitting device (Vertical Chip; it is termed such to indicate the substrate 100 has been removed). In particular, this semiconductor light emitting device can be obtained by aligning electrode films 901, 902 and 903 and an electrode pattern 1010, followed by aligning an electrode 800 and an electrode pattern 1020. A semiconductor light emitting device is then mounted on the wiring board 1000, using a stud bump, paste or eutectic metals 950 and 960, and the substrate 100 is removed by means of a laser.
However, because the above process needs to be performed at the chip level, the process gets lengthy and complicated, and the alignment of the electrode films 901, 902 and 903, the electrode 800, and the electrode patterns 1010 and 1020 also creates difficulties. Apart from that, an increase in costs associated with the phosphor coating at the chip level adds another problem.
Therefore, while the commercialization of TFFC (Thin Film Flip Chip) technology at the chip level represents a high level manufacturing technology of semiconductor light emitting devices, on the other hand, it also openly manifests that the application of such technology at the wafer level is not yet made easy. Many suggestions have been made in order to apply this concept at the wafer level. Nevertheless, neither a semiconductor light emitting device nor a method for manufacturing the same was proposed, which can substantially overcome the difficulties in the alignment of electrode films 901, 902 and 903, the electrode 800 and the electrode patterns 1010 and 1020 and, after a wafer level bonding operation, the cracks in the semiconductor layers 200, 300 and 400 during the removal of the substrate 100 and in the subsequent processes.